How to Neutralize a Transistor Using
LINC2

© 2009 By Dale D. Henkes

The following is an example of how LINC2 can be used to
neutralize a transistor device for making S12 = 0 approximately.  Once the transistor is neutralized at a
specific frequency, matching networks can be designed to match to S11 and S22
independently- with reduced interaction between the application of the two
matching networks (at that frequency).
(With S12 ≈ 0) we can simply match to S11 (at the input) and S22
(at the output) instead of the more complicated simultaneous bilateral match
that is required when S12 ≠ 0.

One possible procedure would be to assume that the internal
device feedback path is capacitive, leading to the application of external
inductance between the input and output device terminals for cancelling the
feedback capacitance.  With this
assumption we can create a simple circuit schematic using the s-parameter file
as the device model with a variable inductor between the input and output
ports.  Then running a circuit
simulation, we can simply tune (or optimize) the inductor for minimum S12.

To illustrate explicitly the relationship between the
internal feedback capacitance and the external neutralizing (inductor)
component, we will start with a model of a FET with known feedback capacitance,
Cf (Figure 1).  Knowing the value of
Cf will enable the calculation of the external neutralizing inductor.  Then we can compare this value to the
value of the inductor optimized (by simulation) to neutralize the equivalent
s-parameter based model.  In fact,
we can generate the s-parameter file from the transistor’s component
model so that the s-parameter based simulation will accurately represent the
transistor (including the internal feedback capacitance).

Start with the FET model:

Figure 1

As can be seen from the LINC2
model parameters for the FET model (Figure 2), the feedback capacitance is Cf =
0.602 pF.  This corresponds to a
42.076904 nH inductor at resonance with Cf at 1000 MHz.  The LINC2 RF Calculator tool was used
(Figure 3 below) to calculate the required inductance for parallel resonance at
1000 MHz.

Figure 2

There are two internal feedback components in the model (Rf
and Cf), but since Rf is greater than 100K it can be ignored.

Figure 3

Create the device
s-parameters from the FET model simulation output:

With the FET model inserted between Port1 and Port2 as in
Figure 1, click SET > Frequency
Sweep… and set the Start and Stop frequencies to 500 and 1500
respectively (101 sweep points should be more than enough).  Click Analyze to run a simulation on this FET model.  Then select Save S-Param Data…
from the main File menu (Figure 4).
We have now captured the device (FET model) s-parameters in the
FET_Model.S2P file.

Figure 4

Create S-Parameter
based schematic with neutralizing inductor applied:

Figure 5

Create a new schematic using the Transistor (S-Parameters) > FET component from the LINC2
schematic Parts menu.  Then add the feedback neutralizing
inductor L1 and DC blocking capacitor C1 and shown in Figure 5.

For the value of L1 we can start with any value and have the
LINC2 optimizer find the correct value to minimize S12.  Since we started with a known value for
Cf (Figures 1 and 2) we can use the calculated value from Figure 3 for the
inductor L1 (42.076904 nH).

However, if we had only the s-parameters from a device with
unknown internal composition (i.e. no access to the transistor model as in
Figures 1 and 2), then we would start with any reasonable guess for L1 such as
10 nH at microwave frequencies or 100 nH at VHF frequencies etc.

Analyze and run
the optimizer to determine the best value of L1 for minimum S12:

With the schematic as in Figure 5, click Set > Frequency Sweep… and set
the Start and Stop frequencies to 900 and 1100 respectively.  Change the number of frequency points to
501.  Enable L1 for tuning and
optimization by double right clicking over the inductor (L1) and checking the Tune box next to the inductor’s
value.  Then select Output… from the Set menu and
click on Another Plot and select M12 (for the second response) as shown
below (Figure 6).  After filling in
the Min and Max vertical scales, click EXIT.

Figure 6

Click Analyze and
then click Optimize in the main
(LINC2 Start-up) menu bar.  Click on
the M12(db) measurement goal tab:

Figure 7

Fill in the optimization measurement goal and frequency for
M12 (magnitude of S12).  -100 dB is close
enough to zero for S12 to reach the goal of minimum S12 at 1000 MHz:

Figure 8

There is no need to specify a goal for M21(db) since we are
only interested in minimizing S12.
The three remaining goals for M12 and all four M21 goals should be left
blank.

Select Show Graph
from the Optimizer’s Graph menu.

Figure 9

Click Optimize
from the Optimizer’s menu (NOT from the LINC2 main start-up menu
bar).  When the optimizer is done a
small Results window will pop up as shown in Figure 10.  (click OK to close the Results window).

Select Update &
Exit from the Optimizer’s File
menu.  The schematic will be updated
with the optimized value for L1 (Figure 5).  Click Analyze and View > Plot
to see the improved response for S12.
The dip in M12 at 1000 MHz shows that the optimum value of L1 for
minimum S12 has been achieved.  This
optimum value of 42.0796 nH for L1 compares almost identically to the value
42.0769 nH calculated (in Figure 3) based on the FET’s internal feedback
capacitance (Cf = 0.602 pF per Figures 1 and 2).  This is an excellent confirmation that
the optimization method based only on the device s-parameters will yield
accurate results (for determining the value of the external neutralization
component) even when the internal value for Cf is not known.

Figure 10

Figure 11 indicates that S12 has been reduced to -68.47 dB
at 1000 MHz (linear magnitude of only 0.000377).  With S12 nearly zero, we can look at the
input and output impedances derived from S11 and S22 for building the
respective matching networks.

Click View > Set
Options and select Impedance
under Display on Smith Chart.  Click Exit and View > Smith
Chart to see the impedance at each port (Figure 12).  At 1000 MHz, the input impedance is Rin +
J Xin = 1.0191 – J 51.019.

Design the input network to match to S11 (input impedance)
by using the LINC2 Impedance Matching Tool (Figure 13).  We set up the matching synthesis for a
match from 50 ohms to Rin + J Xin = 1.0191 – J 51.019 as shown in Figure
13.  We select the Series C Shunt L
network with C = 0.4497 pF and L = 7.117 nH.  Applying these components and values to
the schematic of Figure 5 yields the schematic of Figure 14.

With the input matched to S11 as in Figure 14, we can click Analyze and View > Smith Chart to get the output impedance (from S22 in
Figure 15).

Figure 11

Figure 12

Figure 13

Figure 14

Figure 15

Figure 15 shows that the output impedance (from S22) is Rout
+ J Xout = 58.6 – J 20.985.
The output impedance has shifted slightly from the value of 64.18
– J 26.05 measured before matching the input (but this impedance point
has moved only a little ways on the Smith Chart).

Neutralization has reduced the amount of impedance shift
that would have otherwise occurred if the feedback inductor had not been applied.  There reason why any shift has occurred
at all is that S12 is small but not identically zero.  Also, application of the input matching
network has increased the “neutralized” value of S12 by more than
10 dB.  However, S12 is still down
at -54 dB or better.  So we can use
the output impedance value (Rout + J Xout = 58.6 – J 20.985) from Figure
15 without affecting the input match appreciably.

Using the LINC2 Impedance Matching Tool to design the output
matching network from Rout + J Xout = 58.6 – J 20.985 to 50 ohms we
select the shunt L series C network as shown in Figure 16.  This gives a shunt L value of 11.366 nH
and series C value of 5.6 pF.
Applying these components and values to the output yields the schematic
of Figure 17, complete with both matching networks.

Clicking Analyze
and View > Plot and View > Smith Chart shows the final
simulation results of the unilateral matched amplifier (Figures 18 and
19).  Figure 19 shows that both
ports of the amplifier are matched quite closely to 50 ohms at 1000 MHz (Mkr
3).

Figure 16

Figure 17

Figure 18

Figure 19

Figure 20

Figure 20 plots the magnitude of S11 and S22 in dB for an
indication of the quality of the match over frequency.  Figure 20 indicates that although the
return loss is very good at nearly 38 dB and 62 dB for the input and output
ports respectively, the match is very narrowband.  The 14 dB return loss bandwidth is only
10 MHz or 1%.  This completes the
LINC2 example for demonstrating neutralization to facilitate unilateral
transistor amplifier matching.

It should be noted that in practice a more complex feedback
network may be needed to widen the neutralization bandwidth.  Also, a great deal of care needs to be
taken to prevent instability when applying the neutralization network.  Feedback networks that work well at one
frequency may introduce phase shifts that cause oscillations at other
frequencies.

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