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How to Neutralize a Transistor Usi=
ng
LINC2
© 2009 By Dale D. Henkes
The following is an example of how LINC2 can be used to neutralize a transistor device for making S12 =3D 0 approximately. Once the transistor is neutralized= at a specific frequency, matching networks can be designed to match to S11 and S= 22 independently- with reduced interaction between the application of the two matching networks (at that frequency).&nbs= p; (With S12 ≈ 0) we can simply match to S11 (at the input) and S= 22 (at the output) instead of the more complicated simultaneous bilateral match that is required when S12 ≠ 0.
One possible procedure would be to assume that the int= ernal device feedback path is capacitive, leading to the application of external inductance between the input and output device terminals for cancelling the feedback capacitance. With th= is assumption we can create a simple circuit schematic using the s-parameter f= ile as the device model with a variable inductor between the input and output ports. Then running a circuit simulation, we can simply tune (or optimize) the inductor for minimum S12.<= /p>
To illustrate explicitly the relationship between the internal feedback capacitance and the external neutralizing (inductor) component, we will start with a model of a FET with known feedback capacita= nce, Cf (Figure 1). Knowing the va= lue of Cf will enable the calculation of the external neutralizing inductor. Then we can compare this value to = the value of the inductor optimized (by simulation) to neutralize the equivalent s-parameter based model. In f= act, we can generate the s-parameter file from the transistor’s component model so that the s-parameter based simulation will accurately represent the transistor (including the internal feedback capacitance).
Start with the FET model:
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Figure 1
As can be seen from the L= INC2 model parameters for the FET model (Figure 2), the feedback capacitance is = Cf =3D 0.602 pF. This corresponds to= a 42.076904 nH inductor at resonance with Cf at 1000 MHz. The LINC2 RF Calculator tool was u= sed (Figure 3 below) to calculate the required inductance for parallel resonanc= e at 1000 MHz.
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Figure 2
There are two internal feedback components in the mode=
l (Rf
and Cf), but since Rf is greater than 100K it can be ignored.
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Figure 3
Create the= device s-parameters from the FET model simulation output:
With the FET model inserted between Port1 and Port2 as= in Figure 1, click SET > Frequency Sweep… and set the Start and Stop frequencies to 500 and 1500 respectively (101 sweep points should be more than enough). Click Analyze to run a simulation on this FET model. Then select Save S-Param Data̷= 0; from the main File menu (Figure 4). We have now captured the device (FET model) s-parameters in the FET_Model.S2P file.
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Figure 4
Create S-P= arameter based schematic with neutralizing inductor applied:
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Figure 5
Create a new schematic using the Transistor (S-Parameters) > FET component from the LINC2 schematic Parts menu. Then add the feedback neutralizing inductor L1 and DC blocking capacitor C1 and shown in Figure 5.
For the value of L1 we can start with any value and ha= ve the LINC2 optimizer find the correct value to minimize S12. Since we started with a known valu= e for Cf (Figures 1 and 2) we can use the calculated value from Figure 3 for the inductor L1 (42.076904 nH).
However, if we had only the s-parameters from a device= with unknown internal composition (i.e. no access to the transistor model as in Figures 1 and 2), then we would start with any reasonable guess for L1 such= as 10 nH at microwave frequencies or 100 nH at VHF frequencies etc.
Analyze an= d run the optimizer to determine the best value of L1 for minimum S12:
With the schematic as in Figure 5, click Set > Frequency Sweep… a= nd set the Start and Stop frequencies to 900 and 1100 respectively. Change the number of frequency poi= nts to 501. Enable L1 for tuning and optimization by double right clicking over the inductor (L1) and checking t= he Tune box next to the inductorR= 17;s value. Then select Output… from the Set menu a= nd click on Another Plot and sele= ct M12 (for the second response) as = shown below (Figure 6). After filli= ng in the Min and Max vertical scales, click EXIT.
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Figure 6
Click Analyze= and then click Optimize in the main (LINC2 Start-up) menu bar. Cl= ick on the M12(db) measurement goal t= ab:
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Figure 7
Fill in the optimization measurement goal and frequenc= y for M12 (magnitude of S12). -100 = dB is close enough to zero for S12 to reach the goal of minimum S12 at 1000 MHz:
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Figure 8
There is no need to specify a goal for M21(db) since w= e are only interested in minimizing S12. The three remaining goals for M12 and all four M21 goals should be l= eft blank.
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Select Show G= raph from the Optimizer’s Graph menu.
Figure 9
Click Optimiz= e from the Optimizer’s menu (NOT from the LINC2 main start-up menu bar). When the optimizer is d= one a small Results window will pop up as shown in Figure 10. (click OK to close the Results window).
Select Update= & Exit from the Optimizer’s File menu. The schematic will be u= pdated with the optimized value for L1 (Figure 5). Click Analyze and View > = Plot to see the improved response for S12. The dip in M12 at 1000 MHz shows that the optimum value of L1 for minimum S12 has been achieved. This optimum value of 42.0796 nH for L1 compares almost identically to the value 42.0769 nH calculated (in Figure 3) based on the FET’s internal feedb= ack capacitance (Cf =3D 0.602 pF per Figures 1 and 2). This is an excellent confirmation = that the optimization method based only on the device s-parameters will yield accurate results (for determining the value of the external neutralization component) even when the internal value for Cf is not known.
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Figure 10
Figure 11 indicates that S12 has been reduced to -68.4= 7 dB at 1000 MHz (linear magnitude of only 0.000377). With S12 nearly zero, we can look = at the input and output impedances derived from S11 and S22 for building the respective matching networks.
Click View &g= t; Set Options and select Impedance under Display on Smith Chart.<= span style=3D'mso-spacerun:yes'> Click Exit and View > Smi= th Chart to see the impedance at each port (Figure 12). At 1000 MHz, the input impedance is= Rin + J Xin =3D 1.0191 – J 51.019.
Design the input network to match to S11 (input impeda= nce) by using the LINC2 Impedance Matching Tool (Figure 13). We set up the matching synthesis f= or a match from 50 ohms to Rin + J Xin =3D 1.0191 – J 51.019 as shown in F= igure 13. We select the Series C Sh= unt L network with C =3D 0.4497 pF and L =3D 7.117 nH. Applying these components and valu= es to the schematic of Figure 5 yields the schematic of Figure 14.
With the input matched to S11 as in Figure 14, we can = click Analyze and View > Smith Chart to get the output impedance (from S22 in Figure 15).
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Figure 11
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Figure 12
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Figure 13
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Figure 14
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Figure 15
Figure 15 shows that the output impedance (from S22) i= s Rout + J Xout =3D 58.6 – J 20.985. The output impedance has shifted slightly from the value of 64.18 – J 26.05 measured before matching the input (but this impedance point has moved only a little ways on the Smith Chart).
Neutralization has reduced the amount of impedance shi= ft that would have otherwise occurred if the feedback inductor had not been ap= plied. There reason why any shift has occ= urred at all is that S12 is small but not identically zero. Also, application of the input mat= ching network has increased the “neutralized” value of S12 by more th= an 10 dB. However, S12 is still = down at -54 dB or better. So we ca= n use the output impedance value (Rout + J Xout =3D 58.6 – J 20.985) from F= igure 15 without affecting the input match appreciably.
Using the LINC2 Impedance Matching Tool to design the = output matching network from Rout + J Xout =3D 58.6 – J 20.985 to 50 ohms we select the shunt L series C network as shown in Figure 16. This gives a shunt L value of 11.3= 66 nH and series C value of 5.6 pF. Applying these components and values to the output yields the schema= tic of Figure 17, complete with both matching networks.
Clicking Anal= yze and View > Plot and View > Smith Chart shows the f= inal simulation results of the unilateral matched amplifier (Figures 18 and 19). Figure 19 shows that both ports of the amplifier are matched quite closely to 50 ohms at 1000 MHz (Mkr 3).
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Figure 16
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Figure 17
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